The present invention relates to integrated circuit devices and, in particular, to data sensing circuits and methods for integrated circuit devices.
Integrated circuit devices include a variety of different memory devices. A magnetic random access memory (hereinafter, referred to as “MRAM”) is a type of non-volatile memory that includes a plurality of magnetic memory cells. A MRAM generally provides a form of non-volatile storage based on a magnetoresistive behavior provided between multiple layers consisting of alternately stacked magnetic and non-magnetic layers. The magnetoresistance of such a magnetic memory cell typically has a minimum value when magnetizations of the magnetic layers are in the same direction and a maximum value when magnetizations of the magnetic layers are in opposite directions. The former state may be referred to as “parallel” and may be associated with a logic low level (also referred to herein as a “0” state). The latter state may be referred to as “anti-parallel” and may be associated with a logic high level (also referred to herein as a “1” state).
FIG. 1 is a simplified sectional view of a magnetic tunnel junction (MTJ) of a memory cell. The illustrated MTJ 10 includes a first layer 11 of magnetic material and a second layer 12 of magnetic material with a thin insulating layer 13 therebetween. The sizes of the illustrated regions in FIG. 1 are selected for illustrative purposes only. A read current terminal 14 is electrically connected to the layer 11 and a read current terminal 15 is electrically connected to the layer 12. The layer 11 is constructed so that a magnetic field therein lies generally parallel with and in the direction of a vector 16. Similarly, the layer 12 is constructed so that a magnetic field therein lies generally parallel with and in the direction of a vector 17. For purposes of this description it will be assumed that vector 16 always remains in the direction illustrated (to the right of the page in FIG. 1) and vector 17 is switchable to either point to the left or to the right based on a desired programmed state of the MTJ 10.
A digit line 20 is positioned adjacent to the layer 12. When a current is passed through the digit line 20 a magnetic field is produced in the layer 12. The resulting magnetic field may be used to change the direction of vector 17. The direction of the current determines the direction of the magnetic field produced and, consequently, the resulting direction of the vector 17. In some applications it may be convenient to provide a second source of magnetic field, such as a bit line 21. As illustrated in FIG. 1, the bit line 21 is positioned adjacent to the layer 12 and extends into and out of the figure. In such applications, a current in both digit line 20 and bit line 21 may be required to switch the vector 17 in the layer 12. In programming or “write” modes, the two line embodiment may be convenient, for example, for addressing a specific memory cell in a two dimensional array of memory cells.
Generally, the MTJ 10 has two memory states, one in which the vectors 16 and 17 are aligned and the resistance between the terminals 14 and 15 is a minimum and one in which the vectors 16 and 17 are opposite or misaligned and the resistance between the terminals 14 and 15 is a maximum. There are a variety of ways in which the maximum and/or the minimum resistance values can be established. Known methods include varying the thickness of the layer 13 and/or varying the horizontal area of the layers 11, 12, and 13.
The resistance between the terminals 14 and 15 may be referred to as a tunneling resistance. As this tunneling resistance is generally exponentially varied with respect to a thickness of the insulation layer 13, the tunneling resistance may be significantly varied based on variations in the thickness of the insulation layer 13. The thickness of the insulation layer 13 generally should be maintained uniformly (e.g., below 0.1 Å variation) to provide a magnetoresistive ratio (MR) of 20%. Such a uniformity requirement may impose a burden on the manufacturing process for the memory device. As will be known by those of skill in the art, the MR is used to determine whether data stored in MTJ is a “1” or a “0.”
A conventional MRAM typically includes reference memory cells corresponding to respective data memory cells. Data stored in a data memory cell is read (judged) by applying a sense current to a data memory cell and a reference current to a reference memory cell and then comparing voltages across the data and reference memory cells. As described above, however, a magnetoresistive difference between data and reference memory cells typically must be small to read data in a data memory cell correctly. If a magnetoresistive difference therebetween is large, an operational error may result.